1. Field of the Invention
The present invention relates to a method for manufacturing a printed circuit board with a thin film capacitor embedded therein, more particularly, in which a metal electrode and dielectric film for a capacitor can be formed by sputtering.
2. Description of the Related Art
A smaller, higher-performing and higher-frequency trend of electronic products has recently led to a technology for embedding passive devices in a printed circuit board (PCB) This technology allows embedding of the passive devices that occupy at least 50% of a surface area of the board. Here, capacitors account for at least 50% of the passive devices. Accordingly, this results in smaller products with more flexibility in design which require less solder joints. This enhances reliability of the products and reduces noises thereof. Also, this shortens a connecting path to lower inductance effectively.
Especially, a decoupling capacitor, when employed, is located in a proximity to integrated circuits to eliminate noises arising from power voltage supply and switching. Here, the decoupling capacitor requires much higher capacitance and lower equivalent series inductance (ESL) due to higher speed IC chips. Furthermore, a low inductance chip capacitor (LICC) with less inductance is adopted for a surface mount device (SMD) to reduce inductance to about 300 pH.
When it comes to an embedded capacitor, typically, an embedded decoupling capacitor is constructed of two Cu foils (conductive layers) and a prepreg type insulating layer therebetween. Here, the embedded capacitor has a low capacitance density of 0.77 nF/cm2 (about 20 nF/in2), thus facing an obstacle in its use (resin type). Meanwhile, in ongoing efforts to develop materials for enhancing capacitance density, fillers are dispersed in a resin of the insulating layer to decrease thickness thereof. Here, the capacitor has a capacitance density of 3.1 nF/cm2 (about 20 nF/in2) (complex material type). However, the embedded decoupling capacitor is yet low in capacitance density per area, accordingly with limited availability.
The conventional embedded capacitor as just described is disclosed in U.S. Pat. Nos. 5,261,153, and 6,541,137. Specifically, the document teaches a method for manufacturing a printed circuit board with a capacitor embedded therein by lamination of conductive foils and uncured dielectric sheets alternating therewith. Moreover, the document discloses a high temperature thin film embedded capacitor using a ferroelectric substance. More specifically, the document proposes a barrier layer for preventing the conductive layer from oxidizing from high temperature heat treatment of 400° C. to 800° C.
But in the conventional embedded capacitor, a thin film is formed on an electrode as an RCC type and crystallized through heat treatment to impart a certain dielectric constant to a capacitor product. Then these materials are employed in a PCB process. However, the materials heat treated at a high temperature of 400° C. to 800° C. cannot be configured on a resin-containing PCB. Besides, the conventional embedded capacitor has a problem with alignment due to oxidization, contraction/dilation of electrodes. Also, other problems are entailed by separate fabrication of the conventional embedded capacitor.
This calls for development of a process in which the printed circuit board having the thin film capacitor embedded therein with sufficient dielectric properties is directly applicable to the PCB process. That is, in this PCB process, the thin film capacitor should be fabricated at a low temperature of 200° C. or less since organic materials of the PCB are susceptible to temperature. Also, a process should be developed to overcome problems, e.g., oxidization or corrosion by enchant, attendant to a typical photolithography or etching process.
Therefore, recent attempts have been made to directly fabricate a thin film capacitor in the PCB process by using a dielectric thin film at a room temperature. However, these attempts are accompanied by many technological problems concerning development of dielectric materials with dielectric properties at a low temperature, patterning of dielectrics, and honing of different materials.